1. Field of the Invention
The invention relates generally to a semiconductor memory device and a method for manufacturing the same and, more particularly, to a transistor of a semiconductor memory device and a method for manufacturing the same.
2. Description of the Related Art
The degree of integration of semiconductor memory devices, for example, a dynamic random access memory (DRAM) device, is increasing. Such an increase in the degree of integration causes a variety of problems due to the short channel effect of a transistor that is an element of the semiconductor memory device. As one example of the problems, a general rule that a threshold voltage has no relation to the length or width of a channel is no longer applicable to certain channel structures, in particular, to sub-100 nm channel structures. For this reason, in a conventional transistor having a planar structure it is difficult to obtain a desired threshold voltage. Moreover, it will be easily expected that obtaining the desired threshold voltage becomes more difficult to a sub-50 nm channel structure.
In accordance with the this trend, a variety of transistors having a three-dimensional structure, rather than the planar structure, have been proposed. Examples of three-dimensional transistors include a transistor having a recess channel, and a transistor having a stepped profile. In particular, the transistor having a stepped profile is configured such that the surface of an active region has a stepped profile, and a gate stack is laminated on the stepped profile, thereby achieving an increase in an effective channel length while maintaining a constant area of the transistor.
In addition, one example of transistors, which are mainly used in logic devices rather than memory devices, is a fin field effect transistor (FINFET). The fin field effect transistor is configured such that the surface of an active region partially protrudes to form a fin, and a gate stack is laminated on the fin. The fin field effect transistor having the above described configuration exhibits good On/Off characteristics, high current drive ability, and low back-bias dependency. However, when the fin field effect transistor is employed in a memory device, the fin field effect transistor forms a triple channel in a small region. This results in an increase in a source of leakage current with respect to bonding, and makes it difficult to ensure a sufficient data retention time.